The invention relates to a method of manufacturing a silicon dioxide layer of low roughness deposited on a substrate and to a method of manufacturing a composite substrate or wafer including such silicon dioxide layer as buried layer, in particular for applications in the fields of optics, optoelectronics or electronics.
FIGS. 1A to 1E illustrate the different steps of a prior art process employed for manufacturing such a composite substrate.
As can be seen on FIG. 1A, a silicon dioxide layer 2 is firstly deposited on a bulk substrate 1 termed the “source substrate”, because it is used to provide the material that will constitute later the top layer of the composite substrate. In view of the kind of composite substrate aimed to be obtained, such source substrate may be, for example, a material such as silicon, silicon germanium, strained silicon or germanium.
Among the different techniques used to realize the deposition of the silicon dioxide layer 2, one is known to the skilled person under the acronym “LPCVD TEOS” which means “Low Pressure Chemical Vapour Deposition” of silicon oxide films using “tetraethylorthosilicate” as the source material. Such deposition is carried out by introducing a substrate or a batch of substrates 1 inside a LPCVD reactor and by exposing the substrates in the reactor to tetraethylorthosilicate, the chemical formula of which is Si(OC2H5)4, as the source material for silicon oxide (SiO2). This process provides certain advantages in terms of uniformity or density of the oxide layer obtained as compared to other oxide deposition process such as low temperature or high temperature deposition processes. Then, the dioxide layer 2 thus obtained is submitted to a thermal annealing, in order to improve its structural and electrical properties.
Layers deposited with TEOS have a significantly higher surface roughness than thermally grown layers. Consequently, an additional chemical mechanical polishing (CMP) step is required to smooth the free surface of the silicon dioxide layer 2, before bonding it with another substrate. To do so, one uses a polishing head h (as can be seen in FIG. 1B) with an abrasive paste or liquid.
Next, as seen in FIG. 1C, a zone of weakness 10 is created inside the source substrate 1 by implanting atomic species. The term “atomic species implantation” means any bombardment of molecular or ionic, atomic species which is capable of introducing such species into the material of the source substrate 1, with a maximum concentration of the species located at a given depth from the bombarded surface which depth in the present case is preferably larger than the thickness of the silicon dioxide layer 2. The molecular, ionic or atomic species are introduced into the material with an energy that is also distributed about a maximum.
Implantation of atomic species into the source substrate 1 can be carried out, for example, using an ion beam implanter or a plasma implanter. Preferably, the implantation is carried out by ionic bombardment. More preferably, the implanted ionic species is hydrogen. Other ionic species can advantageously be used alone or in combination with hydrogen, such as ions of rare gases (for example and preferably helium).
A zone of weakness 10 marks the boundary between two portions, namely a thin top layer 11 and the remainder 12 of the substrate. By way of example, reference can be made to the literature concerning the layer transfer method known under the trade name SMART-CUT®. A support substrate 3 is then bonded by molecular bonding to the free surface of the silicon dioxide layer 2 (see FIG. 1D).
Finally, as can be seen in FIG. 1E, the remainder 12 is detached from the source substrate 1, along the zone of weakness 10, to keep only the top layer 11 on the silicon dioxide layer 2 and the support substrate 3. Concerning the detachment, one of the following techniques can be used, either alone or in combination: application of stresses of mechanical or electrical origin, chemical etching or supplying energy (laser, microwaves, inductive heating, and furnace treatment). These detachment techniques are known to the skilled person and will not be described here in further detail. The composite substrate thus obtained is referenced 4.
In the above-mentioned process, the polishing step of FIG. 1B presents numerous drawbacks such as the lack of uniformity of the resulting layer 2, the lack of reproducibility of the process and the low throughput of the process. Further, this additional step increases the manufacturing cost of each substrate or wafer. Thus, there is a need for improvements in this portion of the process.